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<title><![CDATA[ET Study]]></title> 
<link>http://www.rickysu.com/bo/index.php</link> 
<description><![CDATA[Xilinx FPGA and EDK]]></description> 
<language>zh-cn</language> 
<copyright><![CDATA[ET Study]]></copyright>
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<link>http://www.rickysu.com/bo/post/231/</link>
<title><![CDATA[Compile libraries with -O0]]></title> 
<author>RickySu &lt;sutongqi+blog@gmail.com&gt;</author>
<category><![CDATA[动手小记]]></category>
<pubDate>Thu, 09 Oct 2008 03:12:09 +0000</pubDate> 
<guid>http://www.rickysu.com/bo/post/231/</guid> 
<description>
<![CDATA[ 
	问题：在EDK中为某个Project设置的Optimize Level都只针对这个Project下的C，而Library都默认以-O2编译。这对调试的情况有一些不便。怎样设置让LibGen以-O0编译库？<br/><br/>解决：Platform Settings --> Software Platform --> Microblaze_0 --> extra compiler flags = -g -O0 ".<br/><br/>Tags - <a href="http://www.rickysu.com/bo/tags/edk/" rel="tag">edk</a>
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<link>http://www.rickysu.com/bo/post/230/</link>
<title><![CDATA[MicroBlaze SMP Project]]></title> 
<author>RickySu &lt;sutongqi+blog@gmail.com&gt;</author>
<category><![CDATA[资料汇总]]></category>
<pubDate>Wed, 08 Oct 2008 01:20:26 +0000</pubDate> 
<guid>http://www.rickysu.com/bo/post/230/</guid> 
<description>
<![CDATA[ 
	<a href="http://www.escet.urjc.es/~phuerta/SMP_project.htm" target="_blank">http://www.escet.urjc.es/~phuerta/SMP_project.htm</a><br/><div class="quote"><div class="quote-title">引用</div><div class="quote-content">The system can be used as an example of how to build SMP systems on<br/>FPGA and how to write applications for it.<br/><br/>In the software side, a modified version of xilkernel I have developed<br/>is used to write multi-threaded applications that run on the SMP<br/>system. </div></div><br/>Tags - <a href="http://www.rickysu.com/bo/tags/project/" rel="tag">project</a> , <a href="http://www.rickysu.com/bo/tags/microblaze/" rel="tag">microblaze</a>
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<link>http://www.rickysu.com/bo/post/229/</link>
<title><![CDATA[在EDK/SDK中使用/制作Library]]></title> 
<author>RickySu &lt;sutongqi+blog@gmail.com&gt;</author>
<category><![CDATA[动手小记]]></category>
<pubDate>Tue, 07 Oct 2008 10:10:47 +0000</pubDate> 
<guid>http://www.rickysu.com/bo/post/229/</guid> 
<description>
<![CDATA[ 
	先来看Xilinx的两个Answer Record:<br/>AR #<a href="http://www.xilinx.com/support/answers/31256.htm" target="_blank"><span style="color: #FF0000;">31256</span> </a>- 10.1 EDK - How to add a user software library in a project?<br/>AR #<a href="http://www.xilinx.com/support/answers/29926.htm" target="_blank"><span style="color: #FF0000;">29926</span> </a>- 10.1 EDK - How can I create a user library in SDK? <br/><br/>一个说怎么用，一个说怎么做，看似很好，但是那个说怎么做的基本上等于没说。<br/><br/>于是找到另一个教程：<a href="http://www.adp-gmbh.ch/cpp/gcc/create_lib.html" target="_blank"><span style="color: #FF0000;">Creating a shared and static library with the gnu compiler (gcc)</span></a><br/><br/>于是在SDK里实现的基本过程就变成：<br/><br/>1. 在SDK中首先需要把原来的程序调试成功，能得到正确的elf文件<br/>2. 把SDK_projects&#92;<project name>&#92;Debug 目录中的.o文件都copy到另一个文件夹<br/>3. 打开edk shell，用命令mb-ar -rcs libuser.a xx.o xx.o xx.o 把所有的.o文件集合为.a文件<br/>4. 删除原来的.c文件<br/>5. 在SDK的project properities中设置library的名字=user，并添加路径<br/>6. 重新编译工程<br/><br/>[更多资料]<br/><a href="http://www.dwheeler.com/program-library/Program-Library-HOWTO/index.html" target="_blank">http://www.dwheeler.com/program-library/Program-Li...</a><br/>Tags - <a href="http://www.rickysu.com/bo/tags/edk/" rel="tag">edk</a> , <a href="http://www.rickysu.com/bo/tags/sdk/" rel="tag">sdk</a>
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<link>http://www.rickysu.com/bo/post/173/</link>
<title><![CDATA[在EDK中插ChipScope]]></title> 
<author>RickySu &lt;sutongqi+blog@gmail.com&gt;</author>
<category><![CDATA[原创文章]]></category>
<pubDate>Tue, 07 Oct 2008 02:28:35 +0000</pubDate> 
<guid>http://www.rickysu.com/bo/post/173/</guid> 
<description>
<![CDATA[ 
	<span style="color: #0000FF;">[2008.3.13]</span><br/>XPS --> Debug --> Debug Configuration可以很方便地添加ChipScope的各种Core：ILA, IBA, VIO，工具会自动连线。值得注意的是VIO都能自动填上，这在ISE里面是需要手动例化的。<br/><br/>1. IBA 用来观察总线上的信号<br/><br/>2. ILA 可以观察各个Core的端口信号，但是看不到Core内部信号。<br/>&nbsp;&nbsp;&nbsp;&nbsp;如果要看内部信号，Workaround是<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;a.在ISE中添加ILA。需要保证有可用的BSCAN资源，不过一般来说设计中没有自己例话BSCAN的话是不会不够用的。这种方法比b方法方便一些。<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;b.预留好足够的Trigger/Data port，布局布线完成后在FPGA Editor中通过Tools --> ILA 工具修改。这样可以不用ISE（虽然现在import EDK to ISE越来越简单了），但是这样做的潜在问题是ChipScope连线的Timing有可能不满足。<br/><br/>一般来说推荐用a方法。<br/><br/>3. ILA 的属性：<br/>默认情况下Trigger as Data是选上的，此时只需要连接Trig0 Trig1...等端口，不需要连接Data Port。如果取消选择，则需要手动分别选择Trig和Data。<br/><br/><span style="color: #0000FF;">[Update 2008.10.7]</span><br/>4. 另外一种情况是，如果之需要对某一个Core做观察，那么可以把ChipScope ILA单独加到这个Core中。所使用的工具是ChipScope Inserter。<br/>流程是：EDK -> Generate Netlists, 在implementation目录中找到对应的ngc文件，添加到chipscope inserter，设置好trigger属性后生成对应的ngo文件。把ngc文件改名，把ngo再改成ngc。然后在EDK中运行Hardware --> Generate Bitstream。<br/>Tags - <a href="http://www.rickysu.com/bo/tags/fpga/" rel="tag">fpga</a> , <a href="http://www.rickysu.com/bo/tags/edk/" rel="tag">edk</a> , <a href="http://www.rickysu.com/bo/tags/chipscope/" rel="tag">chipscope</a> , <a href="http://www.rickysu.com/bo/tags/xilinx/" rel="tag">xilinx</a> , <a href="http://www.rickysu.com/bo/tags/debug/" rel="tag">debug</a>
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<link>http://www.rickysu.com/bo/post/226/</link>
<title><![CDATA[data2mem]]></title> 
<author>RickySu &lt;sutongqi+blog@gmail.com&gt;</author>
<category><![CDATA[资料汇总]]></category>
<pubDate>Tue, 23 Sep 2008 01:20:58 +0000</pubDate> 
<guid>http://www.rickysu.com/bo/post/226/</guid> 
<description>
<![CDATA[ 
	data2mem有一份非常详细的文档d2m.pdf在ISE安装目录的doc目录中，但是由于太详细了以至于一眼不能找到所需要的内容。<br/>于是在此罗列各种用法：<br/><br/>1. 更新bit文件中BRAM的内容<br/>data2mem -bm my.bmm -bd code.elf -bt my.bit -o b new.bit<br/>注意BMM文件中必须有LOC或者PLACED定义的位置信息<br/><br/>2. dump bit content of memory<br/>data2mem -bm my.bmm -bt my.bit -d<br/><br/>3. dump elf file into verilog, vhdl, ucf file<br/>data2mem -bm my.bmm -bd my.elf -o v my.v<br/>data2mem -bm my.bmm -bd my.elf -o h my.vhd<br/>data2mem -bm my.bmm -bd my.elf -o u my.ucf<br/><br/>4. dump elf file into mem file<br/>data2mem -bm my.bmm -bd my.elf -bx my&nbsp;&nbsp; // my is a directory which exists before running this command<br/><br/>[更多资料]<br/><a href="http://web/~ywu/data2mem_example.zip" target="_blank">http://web/~ywu/data2mem_example.zip</a><br/>Tags - <a href="http://www.rickysu.com/bo/tags/edk/" rel="tag">edk</a> , <a href="http://www.rickysu.com/bo/tags/data2mem/" rel="tag">data2mem</a>
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<link>http://www.rickysu.com/bo/post/227/</link>
<title><![CDATA[[看新闻] 长江后浪推前浪 - Achronix 1.5GHz FPGA w/10.3Gbps SerDes]]></title> 
<author>RickySu &lt;sutongqi+blog@gmail.com&gt;</author>
<category><![CDATA[资料汇总]]></category>
<pubDate>Thu, 18 Sep 2008 01:59:30 +0000</pubDate> 
<guid>http://www.rickysu.com/bo/post/227/</guid> 
<description>
<![CDATA[ 
	<div class="quote"><div class="quote-title">引用</div><div class="quote-content">The first member in the Speedster family, the SPD60, boasts 47,040 LUTs, 144 x 18Kbit Block RAMs, 735 Kbits of Distributed RAM, 98 18x18 multipliers, 8 x 5GBps SerDes, <span style="color: #FF0000;">20 x 10.3Gbps SerDes</span>, 4 x DDR2/DDR3 Controllers, 16 PLLs, ... and the list goes on. </div></div><br/>详细请阅读<br/><a href="http://www.pldesignline.com/210601830" target="_blank">http://www.pldesignline.com/210601830</a><br/>Tags - <a href="http://www.rickysu.com/bo/tags/news/" rel="tag">news</a>
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<link>http://www.rickysu.com/bo/post/210/</link>
<title><![CDATA[EDK works with Sysgen]]></title> 
<author>RickySu &lt;sutongqi+blog@gmail.com&gt;</author>
<category><![CDATA[动手小记]]></category>
<pubDate>Tue, 02 Sep 2008 05:08:27 +0000</pubDate> 
<guid>http://www.rickysu.com/bo/post/210/</guid> 
<description>
<![CDATA[ 
	<span style="color: #0000FF;">[2008.08.04]</span><br/>同时使用EDK和Sysgen，有两种流程：<br/>1、在Sysgen中做hw co-sim；<br/>2、用Sysgen生成pcore然后手动添加到EDK工程中。<br/><br/>参考文档：<br/>- Sysgen User Guide --> Hardware/Software Co-Design --> Design with Embedded Processors and Microcontrollers<br/>- API Documents (在生成PCORE的src目录中)<br/><br/>数据交互方法：<br/>- From/To Registers<br/>- From/To FIFO<br/>- Shared Memory<br/><br/>使用Shared Memory时，记得TestBench中的Shared Memory要设置成 "<span style="color: #FF0000;">owned and initialized elsewhere</span>"，否则等于两处地方都放置了同样名字的Shared Memory，会产生冲突。<br/><br/>API使用方法<br/>参考API文档，下面有例子。基本流程是：<br/><br/><div class="quote"><div class="quote-title">引用</div><div class="quote-content">&nbsp;&nbsp;&nbsp;&nbsp;xc_iface_t *iface;&nbsp;&nbsp;//初始化interface<br/><br/>&nbsp;&nbsp;&nbsp;&nbsp;xc_from_reg_t *fromreg_gray;&nbsp;&nbsp;//初始化register<br/>&nbsp;&nbsp;&nbsp;&nbsp;xc_to_reg_t *toreg_red, *toreg_green, *toreg_blue; //初始化register<br/>&nbsp;&nbsp;&nbsp;&nbsp;xc_shram_t *shram; //初始化shared memory<br/>&nbsp;&nbsp;&nbsp;&nbsp;xc_to_fifo_t *tofifo; //初始化fifo<br/><br/>&nbsp;&nbsp;&nbsp;&nbsp;// initialize the software driver<br/>&nbsp;&nbsp;&nbsp;&nbsp;xc_create(&iface, &RGB2GRAY_PLBW_ConfigTable[0]);<br/><br/>&nbsp;&nbsp;&nbsp;&nbsp;// obtain the memory locations<br/>&nbsp;&nbsp;&nbsp;&nbsp;xc_get_shmem(iface, "result",&nbsp;&nbsp;(void **) &fromreg_gray);&nbsp;&nbsp;//Register 中间引号中的字符串是Sysgen中起的名字<br/>&nbsp;&nbsp;&nbsp;&nbsp;xc_get_shmem(iface, "red",&nbsp;&nbsp; (void **) &toreg_red);<br/>&nbsp;&nbsp;&nbsp;&nbsp;xc_get_shmem(iface, "green", (void **) &toreg_green);<br/>&nbsp;&nbsp;&nbsp;&nbsp;xc_get_shmem(iface, "blue",&nbsp;&nbsp;(void **) &toreg_blue);<br/>&nbsp;&nbsp;&nbsp;&nbsp;xc_get_shmem(iface, "cap_ram0", (void **) &shram);&nbsp;&nbsp;//Shared Memory<br/>&nbsp;&nbsp;&nbsp;&nbsp;xc_get_shmem(iface, "fifo", (void **) &tofifo);&nbsp;&nbsp;//Shared Memory<br/><br/>&nbsp;&nbsp;&nbsp;&nbsp;//写Shared Memory<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;for (i=0;i<10;i++) &#123;<br/>&nbsp;&nbsp;&nbsp;&nbsp;xc_write(iface, xc_get_addr(shram->addr, i), (const unsigned) i+60);<br/>&nbsp;&nbsp;&#125;<br/><br/>&nbsp;&nbsp;&nbsp;&nbsp;//写Register<br/>&nbsp;&nbsp;&nbsp;&nbsp;xc_write(iface, toreg_red->din, 2);<br/><br/>&nbsp;&nbsp;&nbsp;&nbsp;//读 Register<br/>&nbsp;&nbsp;&nbsp;&nbsp;xc_read(iface, fromreg_result->dout, &result); </div></div><br/><br/><span style="color: #0000FF;">[2008.09.02]</span><br/>以上的方法是使用了一个ConfigurationTable。因为Overhead比较大，所以Performance比较低。<br/>另一种直接的读写方法是使用指针。<br/>每块Share Memory的起始地址都可以在xparameters.h中找到。知道了起始地址，使用指针可以很方便得对内容进行读写。<br/><div class="quote"><div class="quote-title">引用</div><div class="quote-content">In the following code snippet, users can read data from a "From Register" shared memory named "FROMREG1" and write it to a "To Register" shared memory named "TOREG1":<br/>volatile unsigned value;<br/>unsigned *fromreg_plb_data;<br/>unsigned *toreg_plb_data;<br/><br/>// get the absolute shared memory addresses from "xparameters.h"<br/>fromreg_plb_data = XPAR_SG_PLBIFACE_0_MEMMAP_FROMREG1;<br/>toreg_plb_data = XPAR_SG_PLBIFACE_0_MEMMAP_TOREG1;<br/><br/>// <span style="color: #FF0000;">read </span>data from shared memory "FROMREG1"<br/>value = *fromreg_plb_data;<br/>// <span style="color: #FF0000;">write </span>data to shared memory "TOREG1"<br/>*toreg_plb_data = value; </div></div><br/>Tags - <a href="http://www.rickysu.com/bo/tags/fpga/" rel="tag">fpga</a> , <a href="http://www.rickysu.com/bo/tags/xilinx/" rel="tag">xilinx</a> , <a href="http://www.rickysu.com/bo/tags/edk/" rel="tag">edk</a> , <a href="http://www.rickysu.com/bo/tags/sysgen/" rel="tag">sysgen</a>
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<link>http://www.rickysu.com/bo/post/160/</link>
<title><![CDATA[Profile]]></title> 
<author>RickySu &lt;sutongqi+blog@gmail.com&gt;</author>
<category><![CDATA[动手小记]]></category>
<pubDate>Tue, 02 Sep 2008 02:53:05 +0000</pubDate> 
<guid>http://www.rickysu.com/bo/post/160/</guid> 
<description>
<![CDATA[ 
	<span style="color: #0000FF;">[2008.01.11]</span><br/>一直没有做成功Profile，原来输在最后一步上。<br/><br/>Profile的主要流程如下：<br/><br/>1. 在硬件中添加用于Profile的timer。方便的方法是在做BSB的时候直接添上，那么中断控制器INTC也就自动连上了。<br/>2. 在Software Platform Settings中设置OS and Libraries --> Enable SW instructive profiling = True --> Profile time<br/>3. 打开SDK，设置project的版本属性为Profile(不是Debug和Release)：右键Project --> Properities --> C/C++ Build --> Configuration = Profile<br/>4. 设置Download ELF为Profile的ELF：Device Configuration --> Program Hardware Settings --> ELF in Profile folder<br/>5. Run Profile: Run --> Run... --> New --> C/C++ Application = Profile/executable.elf --> Profiler --> Enable Profiling --> Scratch Memory Address = Free Memory<br/>按OK后SDK开始Profile。但是有时候会停在%XMD %XMD，Progress一直显示在80% -- <span style="color: #FF0000;">此时按一下回车就可以了</span><br/><br/><span style="color: #0000FF;">问题</span><br/>在ISE 9.2自带的edk_prof.pdf中说在SDK的project中也要设置允许interrupt。但是我没有在main program中打开Interrupt Enable，为什么也能成功？<br/><br/><br/><span style="color: #0000FF;">[2008.09.02]</span><br/>一篇新发布的White Paper - WP348 MicroBlaze System Performance Tuning<br/><a href="http://www.xilinx.com/support/documentation/white_papers/wp348.pdf" target="_blank">http://www.xilinx.com/support/documentation/white_...</a><br/>从一个实例开始讲述如何检查系统瓶颈，如何用Profile工具查看，如何解决问题。<br/>FPGA系统不是通常的系统，它最大的优势是可以用<span style="color: #FF0000;">硬件加速</span>软件计算。<br/><br/><br/><br/><span style="color: #0000FF;">[参考资料]</span><br/>EDK Profiling User Guide - <Xilinx101>&#92;EDK&#92;doc&#92;usenglish&#92;edk_prof.pdf<br/>Tags - <a href="http://www.rickysu.com/bo/tags/edk/" rel="tag">edk</a>
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<link>http://www.rickysu.com/bo/post/221/</link>
<title><![CDATA[NetFPGA]]></title> 
<author>RickySu &lt;sutongqi+blog@gmail.com&gt;</author>
<category><![CDATA[资料汇总]]></category>
<pubDate>Mon, 01 Sep 2008 02:56:04 +0000</pubDate> 
<guid>http://www.rickysu.com/bo/post/221/</guid> 
<description>
<![CDATA[ 
	孤陋寡闻，现在得知这个项目 - NetFPGA <br/><br/>官方网站 <a href="http://netfpga.org" target="_blank">http://netfpga.org</a><br/>OpenHW 小组 <a href="http://openhw.eefocus.com/project/view.php?id=240" target="_blank">http://openhw.eefocus.com/project/view.php?id=240</a><br/><br/>引用介绍<br/><div class="quote"><div class="quote-title">引用</div><div class="quote-content">随着NetFPGA的在北美兴起，愈来愈多的人开始关注到这个最初只是斯坦福大学课堂教学使用的Project。仿佛让人看到最初Spice刚刚兴起的那个瞬间。<br/><br/>NetFPG把FPGA的可配置的特性带入了网络通讯领域，相信在不久的将来，它必将带给更多人更多的惊喜。<br/><br/>NetFPGA可以非常方便的使得研究人员或者高校学生搭建一个高速，硬件加速的网络系统。目前NetFPGA已经融入了斯坦福大学的课程中，教授学生如何设计硬件传送、传发数据的GigE的交换机与路由器。NetFPGA可以为更多的研究人员研究下一代网络提供一个开放的平台。NetFPGA现在所有的硬件代码与软件代码都是开源的。</div></div><br/><br/>一个项目，一个框架，一个平台，可以让师生和研究人员从忽略最底层的实现开始，看到结果，引起兴趣，实践理论，开放源码。<br/>足够的复杂度，足够的实用性，足够的商业支持，都使得这个项目越来越成功。<br/><br/>一个足够大的项目，也使得在FPGA平台上的开源项目真正走入大家的视野。<br/>Tags - <a href="http://www.rickysu.com/bo/tags/%25E6%2583%25B3%25E6%25B3%2595/" rel="tag">想法</a>
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<link>http://www.rickysu.com/bo/post/220/</link>
<title><![CDATA[交付Software developer进行软件开发必须提交的文件]]></title> 
<author>RickySu &lt;sutongqi+blog@gmail.com&gt;</author>
<category><![CDATA[动手小记]]></category>
<pubDate>Thu, 28 Aug 2008 07:19:12 +0000</pubDate> 
<guid>http://www.rickysu.com/bo/post/220/</guid> 
<description>
<![CDATA[ 
	通常一个嵌入式系统总有分硬件工程师和软件工程师。<br/>在FPGA上，生成bitstream之前的工作被认为是硬件的，开发C代码被认为是软件的。<br/><br/>如果硬件工程师做完了，要把硬件平台交给软件工程师使用的话，首先他当然可以把整个工程打包给软件工程师，但是除了这种做法外，还有更简单的做法，以下就是交付软件工程师必要的文件列表：<br/><br/><div class="quote"><div class="quote-title">引用</div><div class="quote-content">system.xmp&nbsp;&nbsp;-- 工程文件<br/>system.mhs&nbsp;&nbsp;-- 硬件描述<br/>system.mss&nbsp;&nbsp;-- 软件描述<br/>implementation/system.bit&nbsp;&nbsp;--硬件bit文件<br/>implementation/system_bd.bmm&nbsp;&nbsp;--BRAM的memory map<br/>etc/download.cmd&nbsp;&nbsp;-- 描述JTAG链信息</div></div><br/><br/>这是最精简的组合了。<br/>如果用XPS打开xmp工程，会显示XPS新建了pcores目录，并拷贝了两个文件：<br/>etc/bitgen.ut<br/>etc/fast_runtime.opt<br/> <br/>之后，软件工程师点击工具栏的SDK图标就可以开始开发软件拉。<br/>Tags - <a href="http://www.rickysu.com/bo/tags/edk/" rel="tag">edk</a>
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